{"title":"Constraint-driven synthesis from architectures described in ELLA","authors":"J. Saunders, C. Clee","doi":"10.1109/EASIC.1990.207977","DOIUrl":null,"url":null,"abstract":"Demonstrates how the new synthesis tool LOCAM, provided by Praxis Electronic Design, gives system designers, for the first time, an automatic route to silicon from behavioural descriptions of their intended architectures. LOCAM avoids the need for time-consuming, error-prone logic design and raises the design reference level from boolean logic equations to abstract descriptions of architectures. The paper illustrates how the performance of a chosen architecture can be pre-determined both by the nature of the ELLA description and by user-defined constraints imposed on LOCAM.<<ETX>>","PeriodicalId":205695,"journal":{"name":"[Proceedings] EURO ASIC `90","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] EURO ASIC `90","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EASIC.1990.207977","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Demonstrates how the new synthesis tool LOCAM, provided by Praxis Electronic Design, gives system designers, for the first time, an automatic route to silicon from behavioural descriptions of their intended architectures. LOCAM avoids the need for time-consuming, error-prone logic design and raises the design reference level from boolean logic equations to abstract descriptions of architectures. The paper illustrates how the performance of a chosen architecture can be pre-determined both by the nature of the ELLA description and by user-defined constraints imposed on LOCAM.<>