Leveraging asymmetric body bias control for low power LSI design

Abstract

Asymmetric body bias control technique is proposed and evaluated. Compared to the conventional symmetric body bias control, the proposed technique provides finer performance control. Real chip measurements proved the feasibility of leakage reduction when asymmetric body bias is employed. In our measurement, 22.3% of leakage reduction is achieved when compared to the conventional body bias control. Our work also considers the practical on-chip body bias generator and proposed a technique which can be available with the body bias generator.