Prototype Front-end ASIC for Silicon-strip Detectors of J-PARC Muon g-2/EDM Experiment

Y. Tsutsumi, T. Kishishita, Yutaro Sato, M. Shoji, Manobu M. Tanaka, T. Mibe, J. Tojo
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引用次数: 2

Abstract

We report on the development of a front-end ASIC for silicon-strip detectors of the J-PARC Muon g-2/EDM experiment. This experiment aims to measure the muon anomalous magnetic moment and electric dipole moment precisely to explore new physics beyond the Standard Model. Since the time and momentum of positrons from muon decay are key information in the experiment, a fast response with high granularity is demanded to silicon-strip detectors as the positron tracker. The readout ASIC is thus required to tolerate a high hit rate of 1.4 MHz per strip and to have deep memory for the period of 40 us with 5 ns time resolution. To satisfy the experimental requirements, an analog prototype ASIC was newly designed with the Silterra 180 nm CMOS technology. In the evaluation test, the time-walk was demonstrated to reach 0.8~ns with a sufficient dynamic range of 6~MIPs and pulse width of 45~ns for 1 MIP event. The design details and performance of the ASIC are discussed in this article.
J-PARC μ子g-2/EDM实验硅带探测器前端ASIC原型
本文报道了J-PARC μ介子g-2/EDM实验硅带探测器前端专用集成电路的研制。本实验旨在精确测量μ子异常磁矩和电偶极矩,以探索超越标准模型的新物理。由于介子衰变产生的正电子的时间和动量是实验中的关键信息,因此作为正电子跟踪器的硅带探测器需要具有高粒度的快速响应。因此,读出ASIC需要容忍每条1.4 MHz的高命中率,并具有40 us的深度存储器,时间分辨率为5 ns。为满足实验要求,采用Silterra 180 nm CMOS技术设计了模拟ASIC原型。在评估测试中,时间步行达到0.8~ns,动态范围为6~MIPs,脉冲宽度为45~ns,为1 MIP事件。本文讨论了ASIC的设计细节和性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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