Highly uniform SOI fabrication by applying voltage during KOH etching of bonded wafers

Abstract

Presents a new technique for thinning SOI bonded wafers by applying voltage during KOH etching. The SOI surface is etched by KOH, and voltage is applied between the supporting substrate and etchant. As a result, etching stops automatically at a certain thickness corresponding to the applied voltage. Conventional MIS etch stopping requires an additional electrode at the SOI surface, and also requires an extra process to provide good ohmic contact at the electrode. Moreover, as it is difficult to apply uniform voltage over a large area SOI active layer, an area with a diameter of only several millimeters can be thinned uniformly. Other techniques, such as scanning of limited area plasma etching and other etch stopping techniques have been proposed to make thin uniform SOI bonded wafers. Most of these techniques, however, involve relatively expensive processes such as plasma thinning, epitaxy and ion implantation. This paper proposes a low-cost etch stopping process for bonded SOI that allows variation of less than /spl plusmn/0.1 /spl mu/m in 150mm /spl phi/ wafers.