Modelling of multi-layered power supply planes with vias

IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI:10.1109/EPEP.2001.967613

Shih-Yen Lee, Y. Yeo, M. Yeo, M. Iyer, N. Do, Wui-Weng Wong

引用次数: 5

Abstract

A 2-layered power plane modelling methodology based on transmission lines (TL) is used to model a commercial microprocessor package up to 10 GHz. Subsequently, a 3-layered power plane model is proposed. This model was further modified to model 3-layered power distribution planes with vias. Comparisons with the measurements showed that the modified model was able to offer accurate simulation results up to 10 GHz.

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带过孔的多层供电平面的建模

采用基于传输线(TL)的两层功率平面建模方法对高达10ghz的商用微处理器封装进行建模。随后，提出了一种三层动力平面模型。将该模型进一步修正为带通孔的3层功率分配平面模型。与实测数据的比较表明，改进后的模型能够提供精确的10 GHz频率的仿真结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)

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