V. Nguyen, Jichao Zhou, Huynsik Son, Hanjung Song, Yongsu Park
{"title":"A chaotic oscillator using Carbon Nanotube based transistors","authors":"V. Nguyen, Jichao Zhou, Huynsik Son, Hanjung Song, Yongsu Park","doi":"10.1109/ICSPCC.2013.6664070","DOIUrl":null,"url":null,"abstract":"A simple and low-power-based discrete-time chaotic oscillator based on Carbon Nanotube Field-Effect Transistors (CNFETs) is presented in this paper. The CNFET is built in SPICE using Wong and Deng's well-known model. The chaotic circuit is composed of a nonlinear circuit that creates an adjustable chaos map, two sample and hold cells for capture and delay functions, and a voltage shifter that works as a buffer and adjusts the output voltage for feedback. The operation of the chaotic circuit was verified via time series and power spectra in the SPICE with a supply voltage of 0.9 V and a frequency of 20 kHz conditions. The CNT-based chaotic circuit design is better at thermal reliability and power consumption in comparing with presented MOS-based design making it suitable for systems where many chaos-signal generators are required on a single chip.","PeriodicalId":124509,"journal":{"name":"2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSPCC.2013.6664070","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A simple and low-power-based discrete-time chaotic oscillator based on Carbon Nanotube Field-Effect Transistors (CNFETs) is presented in this paper. The CNFET is built in SPICE using Wong and Deng's well-known model. The chaotic circuit is composed of a nonlinear circuit that creates an adjustable chaos map, two sample and hold cells for capture and delay functions, and a voltage shifter that works as a buffer and adjusts the output voltage for feedback. The operation of the chaotic circuit was verified via time series and power spectra in the SPICE with a supply voltage of 0.9 V and a frequency of 20 kHz conditions. The CNT-based chaotic circuit design is better at thermal reliability and power consumption in comparing with presented MOS-based design making it suitable for systems where many chaos-signal generators are required on a single chip.