Y. Urakawa, M. Matsui, A. Suzuki, N. Urakawa, K. Sato, T. Hamano, H. Kato, K. Ochri
{"title":"11.5ns 1M x 1/256K x 4TTL BiCMOS SRAM's with voltage- and temperature-compensated interfaces","authors":"Y. Urakawa, M. Matsui, A. Suzuki, N. Urakawa, K. Sato, T. Hamano, H. Kato, K. Ochri","doi":"10.1109/VLSIC.1989.1037493","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":136228,"journal":{"name":"Symposium 1989 on VLSI Circuits","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1989-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1989 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1989.1037493","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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