Louis Sutter, Thanakorn Khamvilai, P. Monmousseau, John B. Mains, E. Feron, P. Baufreton, Francois Neumann, M. Krishna, S. Nandy, R. Narayan, C. Haldar
{"title":"Experimental Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architecture","authors":"Louis Sutter, Thanakorn Khamvilai, P. Monmousseau, John B. Mains, E. Feron, P. Baufreton, Francois Neumann, M. Krishna, S. Nandy, R. Narayan, C. Haldar","doi":"10.1109/DASC.2018.8569348","DOIUrl":null,"url":null,"abstract":"Multi-core processors pervade numerous industries but they still represent a challenge for the aerospace industry, where strong certification of every components is required. One way to make them enforce safety-criticality constraints is to ensure reallocation of critical tasks on the chip when they are affected by hardware faults. This paper describes and compares different models of a task reallocation problem for a reconfigurable multi-core architecture. It also presents the first version of the macroscopic model made of Raspberry Pi that was built to represent the multi-core architecture and to test the task allocation algorithm on an actual system, showing the increased robustness that the reallocation algorithm enables while cores are made faulty.","PeriodicalId":405724,"journal":{"name":"2018 IEEE/AIAA 37th Digital Avionics Systems Conference (DASC)","volume":"80 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE/AIAA 37th Digital Avionics Systems Conference (DASC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASC.2018.8569348","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Multi-core processors pervade numerous industries but they still represent a challenge for the aerospace industry, where strong certification of every components is required. One way to make them enforce safety-criticality constraints is to ensure reallocation of critical tasks on the chip when they are affected by hardware faults. This paper describes and compares different models of a task reallocation problem for a reconfigurable multi-core architecture. It also presents the first version of the macroscopic model made of Raspberry Pi that was built to represent the multi-core architecture and to test the task allocation algorithm on an actual system, showing the increased robustness that the reallocation algorithm enables while cores are made faulty.