A framework for efficient rapid prototyping by virtually enlarging FPGA resources

Abstract

Rapid prototyping using FPGAs is a widely-applied approach for efficient evaluation of hardware structures. We present a rapid prototyping framework by virtually enlarging available FPGA resources. In order to mitigate the development complexity of FPGA-based hardware prototype, the framework provides two abstractions of resources on FPGA platforms: Memory systems and inter-FPGA interconnections on multi-FPGA platforms. The framework enables designers to draw up a target hardware using abstract interfaces as ideal memory systems and interconnections on FPGA platforms. Our evaluation result shows that the slowdowns in running speed under the abstractions are not critical, so that the framework offers the helpful support to develop a high-speed and accurate hardware prototype rapidly.