A 10–67-GHz CMOS step attenuator with improved flatness and large attenuation range

2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2013-03-28 DOI:10.1109/SIRF.2013.6489438

J. Bae, Jaeyoung Lee, C. Nguyen

引用次数: 5

Abstract

A four-bit CMOS step attenuator is designed using a new design method to achieve improved flatness and large attenuation range from 10-67 GHz. The design method is based on the frequency-response characteristics of the conventional Pi-, T-, and distributed attenuators. Over 10-67 GHz, the measured results exhibit attenuation flatness of 6.8 dB and attenuation range of 32-42 dB.

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一种10 - 67 ghz CMOS阶跃衰减器，具有改进的平坦度和大衰减范围

采用新的设计方法设计了一种4位CMOS阶跃衰减器，在10-67 GHz范围内实现了更高的平坦度和更大的衰减范围。设计方法是基于传统的Pi-， T-和分布式衰减器的频率响应特性。在10-67 GHz范围内，测量结果显示衰减平坦度为6.8 dB，衰减范围为32-42 dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

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