An Envelope-Tracking CMOS-SOS Power Amplifier with 50% Overall PAE and 29.3 dBm Output Power for LTE Applications

Abstract

This paper presents a CMOS envelope tracking power amplifier for LTE band-13 (782 MHz) applications. The envelope amplifier is implemented in 0.18 μm bulk CMOS process while the RF power amplifier is designed in 0.35 μm CMOS Silicon-on-Sapphire (SOS) technology. To overcome low breakdown voltage limit of MOSFETs, a stacked FET structure is used. The complete envelope tracking system achieves an overall PAE of 50% for 16 QAM, 10 MHz LTE signal with 6.6 dB peak-to-average ratio (PAPR), while delivering 29.3 dBm output power. A memory-less digital pre-distortion (DPD) is employed to linearize the overall system, which pushes ACLR down to -46.5 dBc.