Digital components for built-in self-test of analog circuits

Abstract

We describe the design and operation of a digital test pattern generator (TPG) along with three accumulator based output response analysis (ORA) circuits that are targeted for implementing Built-In Self-Test (BIST) for analog circuits in mixed signal based ASICs. The test patterns produced by the TPG include ramps, triangle and square waves, pseudo-random noise, and a frequency sweep capability for testing the frequency response of the analog circuit under test. The ORA circuits include single and double precision as well as residue accumulators for magnitude and phase measurements. We include an overview of the complete mixed signal based BIST architecture and simulation system along with the results of our initial application of the BIST architecture to an analog circuit under test.