{"title":"Concurrent dual-band LNA for automotive application","authors":"M. Gamal, M. El-Nozahi, H. El-Hennawy","doi":"10.1109/MWSCAS.2015.7282092","DOIUrl":null,"url":null,"abstract":"This paper presents a concurrent CMOS dual-band LNA (DB-LNA) targeting the FCC automotive short and long range radar bands located at 25.5 GHz and 76.5 GHz, respectively. The DB-LNA utilizes a second order dual-band matching network to achieve a 7 GHz bandwidth in the input matching network at 25.5 GHz. Mathematical formulas assist in determining the matching network and output load components values are presented. The DB-LNA is designed using 65nm CMOS technology and occupies an area of 0.166 mm2. The DB-LNA achieves a voltage gain of 16 dB and 10 dB and a noise figure of 3.5 dB and 8.2 dB at 25.5 GHz and 76.5 GHz, respectively, with a power consumption of 48 mW from a 1.2 V supply.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282092","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper presents a concurrent CMOS dual-band LNA (DB-LNA) targeting the FCC automotive short and long range radar bands located at 25.5 GHz and 76.5 GHz, respectively. The DB-LNA utilizes a second order dual-band matching network to achieve a 7 GHz bandwidth in the input matching network at 25.5 GHz. Mathematical formulas assist in determining the matching network and output load components values are presented. The DB-LNA is designed using 65nm CMOS technology and occupies an area of 0.166 mm2. The DB-LNA achieves a voltage gain of 16 dB and 10 dB and a noise figure of 3.5 dB and 8.2 dB at 25.5 GHz and 76.5 GHz, respectively, with a power consumption of 48 mW from a 1.2 V supply.