An improved timed automata approach for computing exact worst-case delays of AFDX sporadic flows

Abstract

AFDX (Avionics Full Duplex Switched Ethernet) standardised as ARINC 664 is a major upgrade for avionics systems. Guarantees on worst case end-to-end communication delays are required for certification purposes. These guarantees are obtained thanks to safe upper bounds computed by Network Calculus and trajectory approaches. Indeed, up to now, the computation of an exact worst case delay is intractable for industrial size configurations. An existing approach, based on timed automata, allows the analysis of periodic AFDX configurations with up to 18 flows. This paper proposes a modified timed automata approach which not only increases the size of the configuration for which an exact worst case can be obtained but also supports sporadic flows.