Testing programmable interconnect systems: an algorithmic approach

Abstract

Presents an approach for fault detection in programmable wiring networks (PWNs). A comprehensive fault model which includes faults in the nets (open, stuck-at and shorts) as well as in the switches (stuck-off, stuck-on and programming faults) is assumed at both the physical and behavioral levels. In a PWN, the most important issue is to find the minimal number of configurations (or programming phases) as the dominant figure of merit of testing. Through the construction of different graphs, it is shown that this process corresponds to finding the node-disjoint path-sets such that each switch is turned on/off at least once and adjacencies in the nets for possible bridge faults (shorts) are verified. To account for 100% fault coverage of bridge faults, a post-processing algorithm may be required.