{"title":"Efficient Test Architecture based on Boundary Scan for Comprehensive System Test","authors":"T. Chakraborty","doi":"10.1109/ATS.2005.54","DOIUrl":null,"url":null,"abstract":"As electronic systems are becoming more complex with higher performance and require higher reliability, system test is becoming a very challenging task. Traditionally, functional test has been used to detect various design and manufacturing defects for electronic systems. However, functional test doesn’t work efficiently for large and complex systems specially when debugging and diagnosis of failure conditions is targeted. Boundary scan based test technology is being used for testing circuit boards in the industry for over a decade after being standardized by IEEE. This technology provides an access path to all the pins on all boundary scan-able chips on a circuit board.","PeriodicalId":373563,"journal":{"name":"14th Asian Test Symposium (ATS'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th Asian Test Symposium (ATS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2005.54","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
As electronic systems are becoming more complex with higher performance and require higher reliability, system test is becoming a very challenging task. Traditionally, functional test has been used to detect various design and manufacturing defects for electronic systems. However, functional test doesn’t work efficiently for large and complex systems specially when debugging and diagnosis of failure conditions is targeted. Boundary scan based test technology is being used for testing circuit boards in the industry for over a decade after being standardized by IEEE. This technology provides an access path to all the pins on all boundary scan-able chips on a circuit board.