{"title":"Reliability Assessment of BGA Interconnects With CADMP-II","authors":"F. McCluskey, A. Govind, D. Beaudet","doi":"10.1115/imece1996-0895","DOIUrl":null,"url":null,"abstract":"\n Recently the plastic ball grid array (PBGA) has been gaining industry-wide acceptance in high pin count applications as a low-cost alternative to fine-pitch leaded packages such as the plastic quad flat pack (PQFP). The main factors leading to its use include low cost, high I/O density, a small footprint, and the potential for superior electrical and thermal performance with respect to PQFPs [Houghton 1993; Freyman and Pennisi, 1991]. However, concerns about interconnect reliability remain, particularly for systems to be joined with novel solders or conductive adhesives, which are being used increasingly both for environmental reasons and because of the need for higher temperature operating systems. Thus there exists a need to accurately evaluate design trade-offs arising due to these failures in order to increase reliability and drive design improvements.\n A PC-based CAD tool for the assessment of the reliability of PBGA interconnects is presented. This tool facilitates the use of physics-of-failure methodology in design for reliability, virtual qualification and the selection of accelerated test conditions. The tool assesses candidate and existing package designs for reliability in many different environments using a database of fully validated physics-of-failure models. These models calculate times-to-failure for the fundamental mechanisms which cause failure of area array packages housing both bipolar and CMOS based systems. Particular focus is placed on the use of this tool for analyzing the reliability of area array solder joint interconnects, including those made with lead-free solders and conductive adhesives, and on conductive filament formation between the traces in a plastic ball grid array. The addition of the appropriate material properties for high temperature, fatigue resistant, lead-free solders to the materials database, the development of a package designer for PBGA designs, and the incorporation of failure mechanism models for flip chip solder fatigue, PBGA solder joint shear and tensile fatigue, and PBGA conductive filament formation will be discussed. The ability to use this tool to conduct assessments of the susceptibility of PBGAs to non-interconnect failure mechanisms is an added advantage as it permits a determination of the relative importance of interconnect failure as a failure mode.","PeriodicalId":375055,"journal":{"name":"Sensing, Modeling and Simulation in Emerging Electronic Packaging","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Sensing, Modeling and Simulation in Emerging Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1115/imece1996-0895","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Recently the plastic ball grid array (PBGA) has been gaining industry-wide acceptance in high pin count applications as a low-cost alternative to fine-pitch leaded packages such as the plastic quad flat pack (PQFP). The main factors leading to its use include low cost, high I/O density, a small footprint, and the potential for superior electrical and thermal performance with respect to PQFPs [Houghton 1993; Freyman and Pennisi, 1991]. However, concerns about interconnect reliability remain, particularly for systems to be joined with novel solders or conductive adhesives, which are being used increasingly both for environmental reasons and because of the need for higher temperature operating systems. Thus there exists a need to accurately evaluate design trade-offs arising due to these failures in order to increase reliability and drive design improvements.
A PC-based CAD tool for the assessment of the reliability of PBGA interconnects is presented. This tool facilitates the use of physics-of-failure methodology in design for reliability, virtual qualification and the selection of accelerated test conditions. The tool assesses candidate and existing package designs for reliability in many different environments using a database of fully validated physics-of-failure models. These models calculate times-to-failure for the fundamental mechanisms which cause failure of area array packages housing both bipolar and CMOS based systems. Particular focus is placed on the use of this tool for analyzing the reliability of area array solder joint interconnects, including those made with lead-free solders and conductive adhesives, and on conductive filament formation between the traces in a plastic ball grid array. The addition of the appropriate material properties for high temperature, fatigue resistant, lead-free solders to the materials database, the development of a package designer for PBGA designs, and the incorporation of failure mechanism models for flip chip solder fatigue, PBGA solder joint shear and tensile fatigue, and PBGA conductive filament formation will be discussed. The ability to use this tool to conduct assessments of the susceptibility of PBGAs to non-interconnect failure mechanisms is an added advantage as it permits a determination of the relative importance of interconnect failure as a failure mode.
最近,塑料球栅阵列(PBGA)在高引脚数应用中获得了广泛的认可,作为细间距引线封装(如塑料四平面封装(PQFP))的低成本替代品。导致其使用的主要因素包括低成本,高I/O密度,占地面积小,以及相对于pqfp具有优越的电气和热性能的潜力[Houghton 1993;Freyman and Pennisi, 1991]。然而,对互连可靠性的担忧仍然存在,特别是对于使用新型焊料或导电粘合剂连接的系统,由于环境原因和对更高温度操作系统的需求,这些系统的使用越来越多。因此,有必要准确地评估由于这些故障而产生的设计权衡,以提高可靠性并推动设计改进。提出了一种基于pc机的PBGA互连可靠性评估CAD工具。该工具有助于在可靠性设计、虚拟鉴定和加速测试条件选择中使用失效物理方法。该工具使用经过充分验证的失效物理模型数据库,评估候选和现有封装设计在许多不同环境中的可靠性。这些模型计算了导致双极和CMOS系统的区域阵列封装失效的基本机制的失效时间。特别关注的是使用该工具来分析区域阵列焊点互连的可靠性,包括那些由无铅焊料和导电粘合剂制成的,以及塑料球网格阵列中走线之间的导电丝形成。将在材料数据库中添加适合高温、耐疲劳、无铅焊料的材料特性,开发PBGA设计的封装设计器,并将倒装焊料疲劳、PBGA焊点剪切和拉伸疲劳以及PBGA导电丝形成的失效机制模型纳入其中。使用该工具评估pbga对非互连失效机制的敏感性是一个额外的优势,因为它允许确定互连失效作为失效模式的相对重要性。