A 0.3mm/sup 2/ Miniaturized X-Band On-Chip Slot Antenna in 0.13/spl mu/m CMOS

N. Behdad, D. Shi, W. Hong, K. Sarabandi, M. Flynn
{"title":"A 0.3mm/sup 2/ Miniaturized X-Band On-Chip Slot Antenna in 0.13/spl mu/m CMOS","authors":"N. Behdad, D. Shi, W. Hong, K. Sarabandi, M. Flynn","doi":"10.1109/RFIC.2007.380919","DOIUrl":null,"url":null,"abstract":"An on-chip miniaturized slot antenna integrated with a CMOS LNA, on the same chip, is presented in this paper. The antenna operates in the 9-10 GHz frequency band, occupies a die area of only 0.3 mm2, and is fabricated in a standard 0.13 mum RF CMOS process. A LNA implemented on the same substrate is directly matched to the antenna. An efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath it. Measurement results of the fabricated prototype indicate that the antenna shows an active gain of -4.4 dBi and an efficiency of 9% in spite of its close proximity to the lossy silicon substrate.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"35","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2007.380919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 35

Abstract

An on-chip miniaturized slot antenna integrated with a CMOS LNA, on the same chip, is presented in this paper. The antenna operates in the 9-10 GHz frequency band, occupies a die area of only 0.3 mm2, and is fabricated in a standard 0.13 mum RF CMOS process. A LNA implemented on the same substrate is directly matched to the antenna. An efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath it. Measurement results of the fabricated prototype indicate that the antenna shows an active gain of -4.4 dBi and an efficiency of 9% in spite of its close proximity to the lossy silicon substrate.
0.3mm/sup /小型化x波段片上槽天线,0.13/spl mu/m CMOS
本文提出了一种集成CMOS LNA的片上小型化槽天线。该天线工作在9-10 GHz频段,仅占用0.3 mm2的芯片面积,并采用标准的0.13 μ m RF CMOS工艺制造。在同一基板上实现的LNA直接与天线匹配。一种有效的屏蔽技术被用来屏蔽天线下面的低电阻基板。测量结果表明,尽管天线靠近有损硅衬底,但其有源增益为-4.4 dBi,效率为9%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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