A Low-Voltage High-Drive Differential Amplifier For ISDN Applications

ESSCIRC '88: Fourteenth European Solid-State Circuits Conference Pub Date : 1988-09-01 DOI:10.1109/ESSCIRC.1988.5468327

L. Tomasini, A. Gola, R. Castello

引用次数: 5

Abstract

A CMOS differential buffer amplifier for ISDN applications is reported. The chip operates from a single 5 V power supply and can deliver a 6 Vpp 80 kHz signal into a load of 100 ohm and/or 300 pF with a THD of about 0.25 %. The circuit main feature is its PSRR which remain practically constant from de to several hundred kHz around - 75 dB for both positive and negative supplies with the common mode voltage generated ou chip. The step response at 1 % for the same loading conditions is less than 500 nsec for a step of + 1.5V and less than 1 ¿sec for a step of ++6V. By using relatively small devices at the output the amplifier occupies an area of only 1720 square mils in a 2.5 ¿m n-well CMOS technology.

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一种用于ISDN应用的低压高驱动差分放大器

报道了一种适用于ISDN的CMOS差分缓冲放大器。该芯片使用单个5v电源，可以向100欧姆和/或300 pF的负载提供6 Vpp 80 kHz信号，THD约为0.25%。电路的主要特点是它的PSRR几乎保持恒定，从de到几百kHz左右- 75 dB的正负电源与芯片产生的共模电压。相同负载条件下，1%的阶跃响应在+ 1.5V阶跃下小于500 nsec，在++6V阶跃下小于1¿sec。通过在输出端使用相对较小的器件，在2.5 m n阱CMOS技术中，放大器仅占用1720平方密耳的面积。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ESSCIRC '88: Fourteenth European Solid-State Circuits Conference

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