A 1.6 Gb/s, 3 mW CMOS receiver for optical communication

A. Emami-Neyestanak, D. Liu, G. Keeler, N. Helman, M. Horowitz
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引用次数: 34

Abstract

A 1.6 Gb/s receiver for optical communication has been designed and fabricated in a 0.25-/spl mu/m CMOS process. This receiver has no transimpedance amplifier and uses the parasitic capacitor of the flip-chip bonded photodetector as an integrating element and resolves the data with a double-sampling technique. A simple feedback loop adjusts a bias current to the average optical signal, which essentially "AC couples" the input. The resulting receiver resolves an 11 /spl mu/A input, dissipates 3 mW of power, occupies 80 /spl mu/m/spl times/50 /spl mu/m of area and operates at over 1.6 Gb/s.
用于光通信的1.6 Gb/s, 3mw CMOS接收器
以0.25-/spl μ m的CMOS工艺设计并制作了1.6 Gb/s的光通信接收机。该接收机无跨阻放大器,采用倒装式键合光电探测器的寄生电容作为积分元件,采用双采样技术对数据进行解析。一个简单的反馈回路将偏置电流调整为平均光信号,其本质上是“交流耦合”输入。该接收机的输入分辨率为11 /spl mu/A,功耗为3 mW,占用80 /spl mu/m/spl乘以50 /spl mu/m的面积,工作速度超过1.6 Gb/s。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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