Thermal modeling of thin-film SOI transistors

Abstract

Summary form only given. Predictions and analysis of the temperature field in a SOI device can be performed at several levels of complexity. Numerical simulations (e.g. Berger and Chai, 1991) and analytical methods (e.g. Goodson and Flik, 1992) have been used extensively to estimate the temperature field in a SOI device with different levels of accuracy. Numerical simulations of the temperature field in a SOI device can precisely determine the hot spots in a transistor, if proper thermal properties and accurate modeling of the heat generation in the device are considered. The analytical methods can provide physical insights into the effect of SOI device dimensions and thermal properties on the device temperature rise. This work aims to demonstrate the impact of the size effect on the thermal conductivity of thin silicon layers and subsequently on the SOI device thermal resistance.