A Smart Pixel Design For A Dynamic Free-space Optical Backplane

Abstract

Smart pixel arrays for a dynamic optical backplane called the HyperPlane are described. Arrays of "programmable" smart pixels are used to iinject or extract optical signals into the parallel oDtical channels of a free-space optical b'ackplane. By sett ing pixel states appropriately, any network (e.g. crossbar, mesh, hypercube, etc.) can be dynamically embedded into the backplane. Summary: A free-space optical backplane consists of a large number of parallel optical channels (10,000 to 100,000) spaced a few hundred microns apart [ 1][2]. To access these optical channels each printed circuit board will contain one or more smart pixel arrays [ l ] . This paper describes the smart pixel arrays for a free-space optical backplane architecture which we call the "HyperPlane". Fiber . . . . ?itching Node SmaA bixei Arravs 'v Parallel Optical Channels In this architecture the smart pixel arrays are used manage access to the optical channels available in the free-space optical backplane. A smart pixel consists of Figwe 1: A fre-space optical backplane. an incoming window, an out-going window, a latch, two multiplexers and an address bit comparator, as shown in o;t;;f bitto bltto fig. 2. Pixels can be programmed to be in one of three basic states, the "transparent", "transmitting" and "receiving" states, as shown in fig. 3.. The state of a pixel can be changed by down-loading a bit-stream from an associated message-processor. The pixels can also be programmed to receive messages for any destination by down-loading the appropriate address bits. Each smart pixel requires 12 logic gates and they are organized into a 2 dimensional array called a "communication slice" as shown in fig. 4. The data for configuring the slice is loaded in bit-serially from the sides; parallel data to be transmitted enters from the top, and parallel data being received exits from the bottom. The communication slices can be generalized to allow multiple transmissions and/or receptions Of paralld data simultaneously as shown in fig. 5b. Each white box represents a smart pixel (i.e., an optical 1-bit data-path), and each black box represents an electrical 1-bit data-path (i.e., bonding pad). A single die capable of containing 1,024 pixels can be organized in various formats, i.e., one 32-by-32 slice, sixteen 8b y 4 slices, or thirty-two 4-by-8 slices, etc. These organizations allow the architect to vary the ratio of electrical-to-optical IO bandwidth of the die and the architectural aspects of the Hyperplane. Multiple smart pixel arrays form the basis of the HyperPZane architecture. The Hyperplane can embed any conventional interconnection network by programming the pixels accordingly. Optimal embeddings for arrays, meshes, hypercubes and various other networks have been identified and 85 receive Vansmit 4 4 4