Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI -- LVT and RVT Configurations

Amit Karel, M. Comte, J. Gallière, F. Azaïs, M. Renovell
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引用次数: 11

Abstract

In this paper, we analyse the impact of voltage, temperature and body-biasing on the detection of resistive short defects for low-VT (LVT) and regular-VT (RVT) configurations of a 28nm UTBB FDSOI (Ultra-Thin Body & BOX Fully-Depleted Silicon-on-Insulator) technology. We implemented a similar design in each configuration and compared their electrical behaviors with the same resistive short defect. In addition, this work focuses on determining the individual as well as the combined improvements brought by voltage, temperature and body-biasing settings for achieving the maximum coverage of the resistive short defects.
VT和体偏置对28nm UTBB FDSOI - LVT和RVT阻性短探测的影响
在本文中,我们分析了电压、温度和体偏置对28nm UTBB FDSOI(超薄体& BOX全耗尽绝缘体硅)技术低vt (LVT)和常规vt (RVT)配置的电阻性短缺陷检测的影响。我们在每种配置中实现了类似的设计,并比较了它们在相同电阻性短缺陷下的电学行为。此外,本工作的重点是确定电压、温度和体偏置设置所带来的单独以及综合改进,以实现电阻性短缺陷的最大覆盖。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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