{"title":"A One Micron CMOS 160Mbit/s 8×8 Asynchronous Time Division Switch","authors":"G. Surace, D. R. Clewett, A. Pickering","doi":"10.1109/ESSCIRC.1989.5468077","DOIUrl":null,"url":null,"abstract":"This paper describes a CMOS self routing 8 input 8 output 160 Mbit/s switch chip designed on a one micron trench isolation technology and three layers of metal.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1989.5468077","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper describes a CMOS self routing 8 input 8 output 160 Mbit/s switch chip designed on a one micron trench isolation technology and three layers of metal.