Gate driver with 10 / 15ns in-transition variable drive current and 60% reduced current dip

A. Schindler, Benno Koeppl, Ansgar Pottbaecker, M. Zannoth, B. Wicht
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引用次数: 4

Abstract

In various fields, there is a growing need for electric motor drives and inductive power converters. To achieve better switching behavior and lower EME in inductive switching applications, very precise gate control of the power MOSFETs by the gate driver is required. The driver presented in this paper can operate at voltages up to 60V, and it is able to change the gate current in 10 / 15ns (rise / fall delay) within a range of 20mA to 500mA. Achieved by a class B buffer in the output stage, this enables multiple current changes in a 100ns switching transition. A dip in the output current, caused by parasitic capacitances, is reduced from 80% of the full scale current to 20% by a cascode configuration in the driver output stage. The gate voltage is clamped to 11.5V, with a precise clamping circuit to reduce RDS,on with the full gate current, but without stressing the gate oxide with any over voltage. By fully integrating this concept in 130nm HV-BiCMOS, a reduction in external components for limiting overshoot, stress and EME can be achieved.
栅极驱动器具有10 / 15ns转换可变驱动电流和60%的电流下降
在各个领域,对电动机驱动和感应功率变换器的需求日益增长。为了在感应开关应用中实现更好的开关行为和更低的电磁干扰,需要通过栅极驱动器对功率mosfet进行非常精确的栅极控制。本文提出的驱动器可以在高达60V的电压下工作,并且能够在20mA到500mA的范围内以10 / 15ns(上升/下降延迟)的速度改变栅极电流。通过输出级的B类缓冲器实现,这可以在100ns开关转换中实现多次电流变化。由寄生电容引起的输出电流的下降,通过驱动器输出级的级联编码配置从满量程电流的80%降低到20%。栅极电压箝位到11.5V,用精确的箝位电路来降低RDS,在全栅极电流上,但不会对栅极氧化物施加任何过电压。通过将这一概念完全集成到130nm HV-BiCMOS中,可以减少用于限制超调、应力和EME的外部组件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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