Multi-input variable-threshold circuits for multi-valued logic functions

M. Syuto, Jing Shen, K. Tanno, O. Ishizuka
{"title":"Multi-input variable-threshold circuits for multi-valued logic functions","authors":"M. Syuto, Jing Shen, K. Tanno, O. Ishizuka","doi":"10.1109/ISMVL.2000.848596","DOIUrl":null,"url":null,"abstract":"In this paper, two-types of Multi-Input Variable-Threshold (M-I V-T) circuits and their applications to Multi-Valued Logic (MVL) are proposed. M-I V-T circuits are extensions of binary CMOS NAND and NOR gates to multi-valued logic. First, definitions of M-I V-T functions realized with M-I V-T circuits are presented, they are implemented using neuron-MOS transistors. The neuron-MOS transistor is a novel device with multi-input gates and can be fabricated by the standard CMOS process with a double-poly layer. Therefore, the proposed circuits can be easily fabricated by the standard CMOS process instead of using the multi-level ion implantation process. Second, the characteristics of the proposed circuits are evaluated using HSPICE simulations. Third, realization of a product term using M-I V-T circuits is presented. The circuit implementation of the product term is extended naturally from the literal circuit and is more powerful than the literal circuit. Finally, the synthesis of a MVL function with M-I V-T circuits is discussed.","PeriodicalId":334235,"journal":{"name":"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2000.848596","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

In this paper, two-types of Multi-Input Variable-Threshold (M-I V-T) circuits and their applications to Multi-Valued Logic (MVL) are proposed. M-I V-T circuits are extensions of binary CMOS NAND and NOR gates to multi-valued logic. First, definitions of M-I V-T functions realized with M-I V-T circuits are presented, they are implemented using neuron-MOS transistors. The neuron-MOS transistor is a novel device with multi-input gates and can be fabricated by the standard CMOS process with a double-poly layer. Therefore, the proposed circuits can be easily fabricated by the standard CMOS process instead of using the multi-level ion implantation process. Second, the characteristics of the proposed circuits are evaluated using HSPICE simulations. Third, realization of a product term using M-I V-T circuits is presented. The circuit implementation of the product term is extended naturally from the literal circuit and is more powerful than the literal circuit. Finally, the synthesis of a MVL function with M-I V-T circuits is discussed.
用于多值逻辑函数的多输入可变阈值电路
本文提出了两种类型的多输入变阈值电路及其在多值逻辑中的应用。M-I - V-T电路是将二进制CMOS NAND和NOR门扩展到多值逻辑。首先,给出了用M-I V-T电路实现的M-I V-T函数的定义,它们是用神经元- mos晶体管实现的。神经元- mos晶体管是一种具有多输入门的新型器件,可以用标准的CMOS工艺制作双聚层。因此,所提出的电路可以很容易地通过标准的CMOS工艺而不是使用多级离子注入工艺来制造。其次,利用HSPICE仿真对所提电路的特性进行了评估。第三,提出了利用M-I - V-T电路实现产品项的方法。乘积项的电路实现从文字电路自然延伸出来,比文字电路更强大。最后,讨论了用M-I V-T电路合成MVL函数。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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