High-temperature quasi-saturation model of high-voltage DMOS power devices

Abstract

This paper reports the analysis of the high-temperature (300 K-400 K) quasi-saturation behavior of high-voltage DMOS devices using a closed-form quasi-saturation model. Based on the analytical model, at the higher temperature, the quasi-saturation behavior occurs at a smaller gate voltage due to the smaller saturated velocity as verified by the MEDICI results.