Analog/RF circuit design techniques for nanometerscale IC technologies

B. Nauta, A. Annema
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引用次数: 21

Abstract

CMOS evolution introduces several problems in analog design. Gate-leakage mismatch exceeds conventional matching tolerances requiring active cancellation techniques or alternative architectures. One strategy to deal with the use of lower supply voltages is to operate critical parts at higher supply voltages, by exploiting combinations of thin- and thick-oxide transistors. Alternatively, low voltage circuit techniques are successfully developed. In order to benefit from nanometer scale CMOS technology, more functionality is shifted to the digital domain, including parts of the RF circuits. At the same time, analog control for digital and digital control for analog emerges to deal with current and upcoming imperfections.
纳米级集成电路技术的模拟/射频电路设计技术
CMOS的发展给模拟设计带来了一些问题。门漏失配超过常规匹配公差,需要主动抵消技术或替代架构。解决低电压供电问题的一种策略是利用薄氧化晶体管和厚氧化晶体管的组合,使关键部件在更高的供电电压下工作。另外,低压电路技术也得到了成功的发展。为了从纳米级CMOS技术中获益,更多的功能被转移到数字领域,包括部分射频电路。同时,模拟控制对数字和数字控制对模拟的出现,以应对目前和未来的缺陷。
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