Risk Reduction Strategies for SiP Design and Manufacturing

Chaoran Yang, Yuan Zhang, Oscar Tang, Guneet Sethi, F. Song, MC Wong
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Abstract

System-in-Package (SiP) technology provides a valuable opportunity to make products with smaller form factor, enrich functionality, and better reliability performance for consumer electronics. One key reason for SiP's success is the encapsulated structure using molding compound, which can provide protection to all the components inside and allows reduced component-to-component spacing. However, if the design or the manufacturing process have flaws, failures can also occur inside of SiP, and engineers have to spend more effort and time to conduct fault isolation, understand the root cause, and make related corrective actions. In this regard, failure risks not only occur at SiP module level. It can also happen in the final product level when assembled the SiP into it. Therefore, a comprehensive risk analysis, design and manufacturing assessment plan and an effective validation method at an early stage of the SiP development is extremely critical. This paper discusses two typical types of SiP failures. By using these two failure modes as an example, the methodology to identify and mitigate such risks early in the product development process will be demonstrated.
SiP设计和制造的风险降低策略
系统级封装(SiP)技术为消费类电子产品提供了一个宝贵的机会,使产品具有更小的外形尺寸、更丰富的功能和更好的可靠性性能。SiP成功的一个关键原因是使用成型化合物的封装结构,可以为内部的所有组件提供保护,并减少组件之间的间距。但是,如果设计或制造过程存在缺陷,故障也可能发生在SiP内部,工程师必须花费更多的精力和时间进行故障隔离,了解根本原因,并采取相关的纠正措施。在这方面,故障风险不仅发生在SiP模块级别。在将SiP组装到最终产品级别时,也可能发生这种情况。因此,在SiP开发的早期阶段,全面的风险分析、设计和制造评估计划以及有效的验证方法是至关重要的。本文讨论了两种典型的SiP故障类型。通过使用这两种失效模式作为示例,将演示在产品开发过程的早期识别和减轻此类风险的方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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