p-GaN HEMT Hard Switching Fault Type Short-Circuit Detection Based on the Gate Schottky-Barrier Leakage Current and Using a Dual-Channel Segmented CMOS buffer Gate-Driver

Y. Barazi, F. Richardeau, S. Vinnac, N. Rouger
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Abstract

This article presents an alternative solution to the short circuit challenges commonly faced by ultra-fast power transistors. Specially 650V p-GaN HEMTs, where the short-circuit timing capability is very critical, and the presence of thermal run-aways is very sensitive. In response to this issue, a dedicated approach to detect the short-circuit inserting an on-line monitoring gate-resistor through a dual-channel segmented CMOS Gate Driver is proposed. The short-circuit indicator under Hard Switch Fault is based on the Gate-Schottky-Barrier leakage current, which is translated on a voltage drop at the gate-source voltage. The detection circuit can be fully integrated in the IC with a low monitoring voltage. A dual-buffer IC prototype including impedance state and monitoring integrated circuit using XFAB XT018 0.18um CMOS SOI technology was performed. Parametric results show a robust and quick detection propagation delay around 580ns under VDS = 400V and V GS = 5V.
基于栅极肖特基势垒泄漏电流和双通道分段CMOS缓冲栅极驱动器的p-GaN HEMT硬开关故障型短路检测
本文提出了一种解决超快功率晶体管普遍面临的短路挑战的替代方案。特别是650V p-GaN hemt,其短路时序能力非常关键,热失控的存在非常敏感。针对这一问题,提出了一种通过双通道分段CMOS栅极驱动器插入在线监测门电阻来检测短路的专用方法。硬开关故障下的短路指示器基于栅极-肖特基-势垒泄漏电流,该电流由栅极-源电压处的电压降转换而来。检测电路可以完全集成在集成电路中,具有较低的监测电压。采用XFAB XT018 0.18um CMOS SOI技术设计了包含阻抗状态和监测集成电路的双缓冲集成电路原型。参数结果表明,在VDS = 400V和vgs = 5V条件下,检测传播延迟稳定且快速,约为580ns。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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