A multilevel-cell 32 Mb flash memory

Mark E. Bauer, R. Alexis, Gregory E. Atwood, B. Baltar, A. Fazio, K. Frary, M. Hensel, M. Ishac, Jahanshir J. Javanifard, Marcus E. Landgraf, D. Leak, K. Loe, D. Mills, P. Ruby, R. Rozman, S. Sweha, S. Talreja, K. Wojciechowski
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引用次数: 78

Abstract

A flash memory with multilevel cell significantly reduces the memory per-bit cost. A 32 Mb multilevel-cell (MLC) flash memory storing two bits of data per cell achieves 32 Mb memory storage capacity using 16 M flash memory cells. This 32 Mb flash memory on a 0.6 /spl mu/m process has a 2.0/spl times/1.8 /spl mu/m/sup 2/ flash cell. In MLC operation, the logical flash memory cell achieves two bits per cell using four possible states, defined by four flash cell threshold voltage ranges. The relationship between the threshold voltage ranges stored in the first memory cell and the corresponding logic levels is shown in this paper, which also shows a plot of the four threshold voltage distributions, each with a separation range.
多单元32mb闪存
采用多级单元的快闪存储器可以显著降低每比特存储器的成本。一个32mb的多单元(MLC)闪存每单元存储2位数据,使用16m的闪存单元实现32mb的内存存储容量。这个32 Mb闪存在0.6 /spl mu/m进程上有一个2.0/spl times/1.8 /spl mu/m/sup 2/闪存单元。在MLC操作中,逻辑闪存单元使用四种可能的状态实现每个单元两个比特,这些状态由四个闪存单元阈值电压范围定义。本文给出了存储在第一存储单元中的阈值电压范围与相应的逻辑电平之间的关系,并给出了四个阈值电压分布的示意图,每个阈值电压分布都有一个分离范围。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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