A charge-recovery 600MHz FIR filter with 1.5-cycle latency overhead

Abstract

We present a 14-tap 8-bit FIR chip designed using a novel charge-recovery logic family with only 1.5 cycles of additional latency over the best possible static CMOS design. Fabricated in a 0.13µm CMOS process, the chip operates in the 365—600MHz range with a 3nH on-chip inductor. At its resonant frequency of 466MHz, it dissipates 39.1mW and recovers 45% of the energy supplied to it.