{"title":"Design of an 8.5/25.5 GHz active frequency tripler MMIC","authors":"C. J. Verver, M. Stubbs, M. Kiyokawa","doi":"10.1109/ANTEM.2000.7851745","DOIUrl":null,"url":null,"abstract":"The design of an active frequency tripler monolithic microwave integrated circuit (MMIC) for local multipoint communications systems (LMCS) will be described. The x3 multiplier was designed to operate over a 24–27GHz range, or 12% bandwidth, and uses a PHEMT device in common source configuration biased at a class AB quiescent point. Appropriate input and output matching circuits and terminations for undesired harmonics were designed for the multiplier. The circuit was fabricated at a commercial EHF GaAs MMIC foundry with a 0.2 µm low noise AlGaAs/GaAs PHEMT process. The overall chip size is 2.8mm × 1.4mm fabricated on a 100µm thick GaAs substrate. Conversion loss varies between 6dB and 8dB across the 24–27GHz output frequency band. Fundamental, fo, (8–9GHz) suppression is at least 15dB while 2fo (16–18GHz) suppression varies between 10dB and 16dB from the lower to upper edge of the frequency band. Maximum 3rd harmonic output power is about 4dBm with a minimum DC power consumption of 154mW.","PeriodicalId":416991,"journal":{"name":"Symposium on Antenna Technology and Applied Electromagnetics [ANTEM 2000]","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium on Antenna Technology and Applied Electromagnetics [ANTEM 2000]","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ANTEM.2000.7851745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The design of an active frequency tripler monolithic microwave integrated circuit (MMIC) for local multipoint communications systems (LMCS) will be described. The x3 multiplier was designed to operate over a 24–27GHz range, or 12% bandwidth, and uses a PHEMT device in common source configuration biased at a class AB quiescent point. Appropriate input and output matching circuits and terminations for undesired harmonics were designed for the multiplier. The circuit was fabricated at a commercial EHF GaAs MMIC foundry with a 0.2 µm low noise AlGaAs/GaAs PHEMT process. The overall chip size is 2.8mm × 1.4mm fabricated on a 100µm thick GaAs substrate. Conversion loss varies between 6dB and 8dB across the 24–27GHz output frequency band. Fundamental, fo, (8–9GHz) suppression is at least 15dB while 2fo (16–18GHz) suppression varies between 10dB and 16dB from the lower to upper edge of the frequency band. Maximum 3rd harmonic output power is about 4dBm with a minimum DC power consumption of 154mW.