{"title":"Performance analysis on active rectifier structures for inductively powered application","authors":"Q. Low, Mi Zhou, L. Siek","doi":"10.1109/ISICIR.2016.7829700","DOIUrl":null,"url":null,"abstract":"In this study, two active rectifier structures which are the full-wave rectifier and the two-stage rectifier for inductively powered application are analyzed and presented. This paper provides a precise analysis on the differences between the two structures and investigates the best load condition for the maximal performance in each of the structures respectively. Mathematical equations are derived to model the power losses and the power conversion efficiency. Moreover, the estimated values from the derived equations are shown to be tallied with the simulation results. Both of the structures are fabricated in standard CMOS 0.18µm AMS process. Simulation results show that they achieve a peak efficiency of 96.8% and 97.4% respectively at the frequency of 125 kHz with varying AC amplitude of 1.2V–2.5V.","PeriodicalId":159343,"journal":{"name":"2016 International Symposium on Integrated Circuits (ISIC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Symposium on Integrated Circuits (ISIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISICIR.2016.7829700","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this study, two active rectifier structures which are the full-wave rectifier and the two-stage rectifier for inductively powered application are analyzed and presented. This paper provides a precise analysis on the differences between the two structures and investigates the best load condition for the maximal performance in each of the structures respectively. Mathematical equations are derived to model the power losses and the power conversion efficiency. Moreover, the estimated values from the derived equations are shown to be tallied with the simulation results. Both of the structures are fabricated in standard CMOS 0.18µm AMS process. Simulation results show that they achieve a peak efficiency of 96.8% and 97.4% respectively at the frequency of 125 kHz with varying AC amplitude of 1.2V–2.5V.