Weishen Chu, Seyyed Ehsan Esfahani Rashidi, Yanli Zhang, J. Alsmeier, Toshiyuki Sega
{"title":"An Analytical Model for Thin Film Pattern-dependent Asymmetric Wafer Warpage Prediction","authors":"Weishen Chu, Seyyed Ehsan Esfahani Rashidi, Yanli Zhang, J. Alsmeier, Toshiyuki Sega","doi":"10.1109/IMW52921.2022.9779248","DOIUrl":null,"url":null,"abstract":"Wafer warpage can cause severe issues in semiconductor fabrication process. In 3D Flash industry, wafer warpage control is crucial to achieve 3D NAND scaling. This study proposed an analytical model to rapidly predict the stepwise asymmetric wafer warpage in the NAND integration procedure. The impact of film pattern on wafer warpage was introduced to the model via effective material stiffness calculation. The model was validated by stepwise wafer warpage measurements, and parametric analysis was conducted to investigate the effects of key NAND design parameters on asymmetric wafer warpage.","PeriodicalId":132074,"journal":{"name":"2022 IEEE International Memory Workshop (IMW)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW52921.2022.9779248","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Wafer warpage can cause severe issues in semiconductor fabrication process. In 3D Flash industry, wafer warpage control is crucial to achieve 3D NAND scaling. This study proposed an analytical model to rapidly predict the stepwise asymmetric wafer warpage in the NAND integration procedure. The impact of film pattern on wafer warpage was introduced to the model via effective material stiffness calculation. The model was validated by stepwise wafer warpage measurements, and parametric analysis was conducted to investigate the effects of key NAND design parameters on asymmetric wafer warpage.