G. Cardarilli, M. D. Zenzo, P. O. Pistilli, A. Salsano
{"title":"A high speed Reed-Solomon encoder-decoder for fault tolerant solid state disks","authors":"G. Cardarilli, M. D. Zenzo, P. O. Pistilli, A. Salsano","doi":"10.1109/DFTVS.1993.595613","DOIUrl":null,"url":null,"abstract":"Many applications actually require high performance, fault tolerant mass memories, which can be implemented using solid state devices. The high cost of semiconductor memories is a fundamental obstacle to the use of semiconductor devices instead of mechanical ones in mass storage memories. The use of faulty memories connected with an ECC VLSI circuit is proposed to overcome these problems. The authors present both a general purpose architecture which can be used as a transparent replacement of a normal hard disk and the coding-decoding circuit which uses the Reed-Solomon code for coding and an original modified error trapping technique for decoding. Using this algorithm it is possible to reach the high transfer rate necessary for high performance solid state disks (SSDs) and the requirements of fault tolerance needed to use faulty memories. The proposed decoding technique, patented, has been used by Texas Instruments in an on-the-shelf SSD.","PeriodicalId":213798,"journal":{"name":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1993.595613","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Many applications actually require high performance, fault tolerant mass memories, which can be implemented using solid state devices. The high cost of semiconductor memories is a fundamental obstacle to the use of semiconductor devices instead of mechanical ones in mass storage memories. The use of faulty memories connected with an ECC VLSI circuit is proposed to overcome these problems. The authors present both a general purpose architecture which can be used as a transparent replacement of a normal hard disk and the coding-decoding circuit which uses the Reed-Solomon code for coding and an original modified error trapping technique for decoding. Using this algorithm it is possible to reach the high transfer rate necessary for high performance solid state disks (SSDs) and the requirements of fault tolerance needed to use faulty memories. The proposed decoding technique, patented, has been used by Texas Instruments in an on-the-shelf SSD.