20V Asymmetric Complementary Power Device Implementation within a 0.25um CMOS Technology for Power Management

Abstract

This paper presents a process flow in which a 20V-class of power devices is added to baseline 0.25mum CMOS technology by forming asymmetric extended-drain device structures in which shallow-trench-isolation (STI) is incorporated within the device unit cell, forming a gate extended-drain dielectric region. The Rsp-BVds figure-of-merit is consistent with best-in-class for this device construction (0.16 mOhm cm2/24V), and the isolated high-voltage diode capability make this process cost-effective for implementation of mobile power management circuit topologies, including multiple-output DC-DC converters, battery chargers, linear regulators, audio power amplifiers, and white-light backlighting systems