Compact Modeling of Suspended Gate FET

Y. Chauhan, D. Tsamados, N. Abelé, Christoph Eggimann, M. Declercq, A. Ionescu
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引用次数: 12

Abstract

For the first time, a compact model for suspended gate (SG) FET valid for entire bias range is proposed. The model is capable of simulating both pull-in and pull-out effects, which are the two important phenomena of this device. A novel hybrid numerical simulation approach combining ANSYS Multiphysics and ISE-DESSIS in a self-consistent system is developed. The model is then validated on this numerical device simulation of SGFET. The model shows excellent performance over the entire drain and gate voltage range. The model has been implemented in Verilog-A code and tested on ELDO and Spectre simulators, which makes it useful for circuit simulations using SGFET devices.
悬栅场效应管的紧凑建模
首次提出了一种适用于整个偏置范围的悬栅场效应管紧凑模型。该模型能够模拟该装置的两种重要现象——拉入效应和拉出效应。提出了一种结合ANSYS Multiphysics和ISE-DESSIS的自相容系统混合数值模拟方法。然后在SGFET的数值器件仿真上验证了该模型。该模型在整个漏极和栅极电压范围内均表现出优异的性能。该模型已在Verilog-A代码中实现,并在ELDO和Spectre模拟器上进行了测试,这使得它可以用于使用SGFET器件的电路仿真。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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