0.7-6 GHz Programable Gain Push-Pull Driver PA Based on Dual-Loop Biases

Abstract

A 28 nm 0.7-6 GHz programable push-pull driver power amplifier (DPA) based on dual-loop biases for Sub-6 GHz band is presented. Based on the dual-loop biases, the DPA can dynamically adjust two gate biases to ensure low output HD2 and HD3, in addition the DPA is robust over process, voltage, and temperature (PVT) variations. The DPA achieves wideband frequency coverage with off-chip matching network. The DPA consists of thermometer-weight transconductors and binary-weighted transconductors. The transmitter prototype with the DPA achieves 32 dB dynamic gain range, 0.5 dB accuracy in 1 dB step over the Sub-6 GHz band. Fabricated in 28 nm CMOS technology, the DPA shows 30.5 dBm OIP3 while consuming 62 mA from 1.8 V power supply for high gain setting.