Cliff Sandstrom, Benedict A. San Jose, Jen-Kuang Fang, Ping-Feng Yang, Sheng Feng-Huang, Ping-Ching Shen
{"title":"Mask-less Laser Direct Imaging & Adaptive Patterning Solution for Fan-Out Heterogeneous Integration on 600mm","authors":"Cliff Sandstrom, Benedict A. San Jose, Jen-Kuang Fang, Ping-Feng Yang, Sheng Feng-Huang, Ping-Ching Shen","doi":"10.1109/EPTC56328.2022.10013262","DOIUrl":null,"url":null,"abstract":"The semiconductor industry is turning to advanced heterogeneous integration to achieve significant system-level performance improvements. The industry is looking to replace current packaging technologies such as flip-chip ball grid array (FC-BGA) and wafer-level chip scale packaging (WLCSP) with fanout wafer level packaging (FOWLP) due to its ability to allow for higher density interconnects in a smaller form factor with lower cost and better electrical performance. The combination of smaller devices and the desire for thousands of chip-to-chip connections are driving an unprecedented need for shrinking the device bond pad pitch. Currently running at volumes in the millions per day on 300mm round format, Deca's M-Series™ fan-out technology and Adaptive Patterning® (AP) are being scaled up to 600mm for production at ASE. The extension of the first and introduction of our second-generation M -Series & AP technologies will be explored as they deliver ultra-high-density 20µm area array bond pad pitch through a unique design-during-manufacturing process using Laser Direct Imaging (LDI) with 250nm digital patterns.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC56328.2022.10013262","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The semiconductor industry is turning to advanced heterogeneous integration to achieve significant system-level performance improvements. The industry is looking to replace current packaging technologies such as flip-chip ball grid array (FC-BGA) and wafer-level chip scale packaging (WLCSP) with fanout wafer level packaging (FOWLP) due to its ability to allow for higher density interconnects in a smaller form factor with lower cost and better electrical performance. The combination of smaller devices and the desire for thousands of chip-to-chip connections are driving an unprecedented need for shrinking the device bond pad pitch. Currently running at volumes in the millions per day on 300mm round format, Deca's M-Series™ fan-out technology and Adaptive Patterning® (AP) are being scaled up to 600mm for production at ASE. The extension of the first and introduction of our second-generation M -Series & AP technologies will be explored as they deliver ultra-high-density 20µm area array bond pad pitch through a unique design-during-manufacturing process using Laser Direct Imaging (LDI) with 250nm digital patterns.