Flexible folded FIR filter architecture

Abstract

Configurable folded bit-plane architecture for FIR filtering that allows programming of both number of taps and coefficient length is proposed in this paper. Proposed architecture allows designing of flexible folded FIR filter array with fixed size that enables efficient implementation of different wireless standards on single filter. This paper deals with the mapping of unfolded data flow graph onto the configurable folded system using a new folding set assignment. The obtained architecture as a folded system is described by data flow graph, functional block diagram and data flow diagram.