{"title":"Influence of interface trap charge density on reliability issues of transparent gate recessed channel (TGRC) MOSFET","authors":"Ajay Kumar, M. M. Tripathi, R. Chaujar","doi":"10.1109/ICMDCS.2017.8211538","DOIUrl":null,"url":null,"abstract":"This paper examines the reliability issues of In2O5Sn (ITO) gate electrode (Transparent Gate) Recessed Channel (TGRC) MOSFET by considering the influence of interface trap charges polarity and density present at the Si/SiO2 interface. The reliability of TGRC MOSFET is observed in terms of Linearity and distortion FOMs such as gm, gm3, VIP3. IIP3, HD3. IMD3. Results so obtained revealed that the existence of interface trap charges alter the flat band voltage and thus the threshold voltage; thereby modifying the linearity performance of the device. Moreover, it is also observed that as trap charge density increases, performance escalates considerably. It is found that with positive trap density of 3e12 cm−2, VIP3, IIP3 degrades owing to high distortions (gm3). Thus, results signify that TGRC MOSFET is more reliable to negative trap charges at the Si/SiO2 interface as compared to positive trap charges.","PeriodicalId":314717,"journal":{"name":"2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMDCS.2017.8211538","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper examines the reliability issues of In2O5Sn (ITO) gate electrode (Transparent Gate) Recessed Channel (TGRC) MOSFET by considering the influence of interface trap charges polarity and density present at the Si/SiO2 interface. The reliability of TGRC MOSFET is observed in terms of Linearity and distortion FOMs such as gm, gm3, VIP3. IIP3, HD3. IMD3. Results so obtained revealed that the existence of interface trap charges alter the flat band voltage and thus the threshold voltage; thereby modifying the linearity performance of the device. Moreover, it is also observed that as trap charge density increases, performance escalates considerably. It is found that with positive trap density of 3e12 cm−2, VIP3, IIP3 degrades owing to high distortions (gm3). Thus, results signify that TGRC MOSFET is more reliable to negative trap charges at the Si/SiO2 interface as compared to positive trap charges.