{"title":"Thermal analysis of a chip on board (COB)","authors":"J. De Moerloose, W. Temmerman","doi":"10.1109/STHERM.1997.566788","DOIUrl":null,"url":null,"abstract":"While solving many of today's chip interconnection problems, MCM technology presents major challenges with respect to thermal compatibility. The high power dissipation on a very limited area in many cases forces additional cooling measures such as thermal vias and heat sinks. Whether such measures should be applied or not and, if so, where to apply them, are just some of the questions that have to be answered in the design process. Fortunately, new tools are coming to the aid of the designer. Current CFD software has evolved in such a way that a detailed simulation of a single chip on the scale of a module is no longer beyond our reach. In this paper we present a set of simulations (using the CFD software FLOTHERM) that were performed on a typical chip-on-board implementation of a clock function for a broadband fine-board. Junction temperatures are calculated for different types of heat sinks. In the second part of the paper, some experiments on a thermal test module are described and the thermal resistance of each chip was determined for different MCM-L thermal technologies.","PeriodicalId":126120,"journal":{"name":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STHERM.1997.566788","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
While solving many of today's chip interconnection problems, MCM technology presents major challenges with respect to thermal compatibility. The high power dissipation on a very limited area in many cases forces additional cooling measures such as thermal vias and heat sinks. Whether such measures should be applied or not and, if so, where to apply them, are just some of the questions that have to be answered in the design process. Fortunately, new tools are coming to the aid of the designer. Current CFD software has evolved in such a way that a detailed simulation of a single chip on the scale of a module is no longer beyond our reach. In this paper we present a set of simulations (using the CFD software FLOTHERM) that were performed on a typical chip-on-board implementation of a clock function for a broadband fine-board. Junction temperatures are calculated for different types of heat sinks. In the second part of the paper, some experiments on a thermal test module are described and the thermal resistance of each chip was determined for different MCM-L thermal technologies.