Design of a High Voltage Level Shift with High dV/dt Immunity and High Speed

Abstract

A sub-nanosecond-delay level shifter with an above 75V/ns power supply slew tolerance is proposed in this paper. In this design, two speed-up branches are adapted to realize a sub-ns delay and high CMTI immunity circuit is proposed to ensure high dv/dt tolerance. Besides, with the control of CMTI enhanced logic, speed-up branches are reused to enhance the dv/dt immunity for a better CMTI performance. And this structure can be expended to higher voltage range of application like 80V level shifter to tolerant the large range power supply slew. The proposed level shifter simulated with 0.18µm BCD process shows delay of 700ps and 30V/ns dv/dt immunity in the 35V high voltage application and can tolerant an 75V/ns dv/dt in 80V application.