{"title":"A 1.2V current mirror double balanced mixer with current reusing technique","authors":"Xiao Shi, Jianhui Wu, Zhilin Liu","doi":"10.1109/ELNANO.2013.6552002","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a double balanced current-mirror mixer with current reusing technique. The proposed mixer is based on high linearity current mirror structure which guarantees a high IIP3. To improve the power efficiency of the current mirror structure, a current reusing technique is used to share the bias current of the transconductance stage and the output stage. Compared with the traditional current mirror mixer, a power decrease of 36% can be achieved. The mixer is designed in 0.13-μm 1P8M RFCMOS process; operating at the frequency of 1GHz. Simulation results indicate a peak conversion gain of 12.6dB, a relatively high IIP3 of 4.0dBm and a moderate NF of 16dB. The whole mixer has a power consumption of 3.84mW under 1.2V supply voltage.","PeriodicalId":443634,"journal":{"name":"2013 IEEE XXXIII International Scientific Conference Electronics and Nanotechnology (ELNANO)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE XXXIII International Scientific Conference Electronics and Nanotechnology (ELNANO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ELNANO.2013.6552002","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents the design of a double balanced current-mirror mixer with current reusing technique. The proposed mixer is based on high linearity current mirror structure which guarantees a high IIP3. To improve the power efficiency of the current mirror structure, a current reusing technique is used to share the bias current of the transconductance stage and the output stage. Compared with the traditional current mirror mixer, a power decrease of 36% can be achieved. The mixer is designed in 0.13-μm 1P8M RFCMOS process; operating at the frequency of 1GHz. Simulation results indicate a peak conversion gain of 12.6dB, a relatively high IIP3 of 4.0dBm and a moderate NF of 16dB. The whole mixer has a power consumption of 3.84mW under 1.2V supply voltage.