Formal Design Space Exploration for memristor-based crossbar architecture

Marcello Traiola, M. Barbareschi, A. Bosio
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引用次数: 1

Abstract

The unceasing shrinking process of CMOS technology is leading to its physical limits, impacting several aspects, such as performances, power consumption and many others. Alternative solutions are under investigation in order to overcome CMOS limitations. Among them, the memristor is one of promising technologies. Several works have been proposed so far, describing how to synthesize boolean logic functions on memristors-based crossbar architecture. However, depending on the synthesis parameters, different architectures can be obtained. Design Space Exploration (DSE) is therefore mandatory to help and guide the designer in order to select the best crossbar configuration. In this paper, we present a formal DSE approach. The main advantage is that it does not require any simulation and thus it avoids any runtime overheads. Preliminary results show the huge gain in runtime compared to simulation-based DSE.
基于忆阻器的横杆建筑形式设计空间探索
CMOS技术不断缩小的过程导致其物理极限,影响了几个方面,如性能,功耗和许多其他。为了克服CMOS的限制,替代解决方案正在研究中。其中,忆阻器是一种很有前途的技术。到目前为止,已经提出了一些工作,描述了如何在基于忆阻器的交叉结构上合成布尔逻辑函数。然而,根据合成参数的不同,可以得到不同的结构。因此,设计空间探索(Design Space Exploration,简称DSE)是帮助和指导设计师选择最佳横梁配置的必备工具。在本文中,我们提出了一种正式的DSE方法。主要优点是它不需要任何模拟,因此避免了任何运行时开销。初步结果表明,与基于仿真的DSE相比,该方法在运行时间上有很大的提高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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