A 16 MBPS adapter chip for the token-ring local area network

IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers Pub Date : 1989-02-15 DOI:10.1109/ISSCC.1989.48239

J. D. Blair, A. Correale, C. Cranford, D. A. Dombrowski, C.F. Erdelyi, C. R. Hoffman, J. L. Lamphere, K. W. Lang, J.K. Lee, M. Mullen, R.R. Norman, S.F. Oakland

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引用次数: 2

Abstract

An adaptor chip is described which is the result of a cost-reduction and function-enhancement project that yielded a single CMOS VLSI module capable of performing all major LAN (local area network) adapter functions and supporting a 16-Mb/s data rate. The chip when combined with external PROM and RAM modules, bus drivers, and discrete line interface components, forms a complete token-ring adapter. The protocol handler performs most bit- and byte-level functions required to implement the IEEE 802.5 protocol and contains rate machines which automatically perform frame-transmit and receive operations directly between the network and the adapter RAM. The design of the chip uses a mix of fully custom and standard cell approaches. Two process enhancements were employed in a standard digital process in order to achieve high-performance analog functions: a high-implant thin-oxide capacitor and a low-threshold n-channel transistor.<>

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用于令牌环局域网的16 MBPS适配器芯片

本文描述了一种适配器芯片，它是一个降低成本和增强功能的项目的结果，该项目产生了一个单一的CMOS VLSI模块，能够执行所有主要的LAN(局域网)适配器功能并支持16mb /s的数据速率。该芯片与外部PROM和RAM模块、总线驱动程序和离散线接口组件相结合，形成一个完整的令牌环适配器。协议处理程序执行实现IEEE 802.5协议所需的大多数位和字节级功能，并包含直接在网络和适配器RAM之间自动执行帧传输和接收操作的速率机器。芯片的设计使用了完全定制和标准单元方法的混合。为了实现高性能模拟功能，在标准数字过程中采用了两种工艺增强:高植入物薄氧化物电容器和低阈值n通道晶体管。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers

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