CMOS Annealing Machine: A Domain-Specific Architecture for Combinatorial Optimization Problem

Abstract

Domain-specific architectures are being studied to improve computer performance beyond the end of Moore’s Law. Here, we propose a new computing architecture, the CMOS annealing machine, which provides a fast means of solving combinatorial optimization problems. Our architecture is based on in-memory computing architecture through utilizing the locality of interactions in the Ising model. The prototype presented in 2019 has two processors on a business-card-sized board and solves problems 55 times faster than conventional computers.