High performance multilevel interconnection system with stacked interlayer dielectrics by plasma CVD and bias sputtering

M. Abe, Y. Mase, T. Katsura, O. Hirata, T. Yamamoto, S. Koguchi
{"title":"High performance multilevel interconnection system with stacked interlayer dielectrics by plasma CVD and bias sputtering","authors":"M. Abe, Y. Mase, T. Katsura, O. Hirata, T. Yamamoto, S. Koguchi","doi":"10.1109/VMIC.1989.78001","DOIUrl":null,"url":null,"abstract":"A novel multilevel interconnection system for bipolar or BiCMOS LSIs was developed. Bias sputtered quartz (BSQ) and plasma CVD SiO(P-SiO) constituted the stacked interlayer, making it possible to smooth high aspect ratio (0.82) topography. The electrical properties of the films and the manufacturing-process damage were investigated. The results show that the stacked structure offers good electrical stability and reliability. This system was successfully applied to real devices.<<ETX>>","PeriodicalId":302853,"journal":{"name":"Proceedings., Sixth International IEEE VLSI Multilevel Interconnection Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., Sixth International IEEE VLSI Multilevel Interconnection Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VMIC.1989.78001","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

A novel multilevel interconnection system for bipolar or BiCMOS LSIs was developed. Bias sputtered quartz (BSQ) and plasma CVD SiO(P-SiO) constituted the stacked interlayer, making it possible to smooth high aspect ratio (0.82) topography. The electrical properties of the films and the manufacturing-process damage were investigated. The results show that the stacked structure offers good electrical stability and reliability. This system was successfully applied to real devices.<>
利用等离子体CVD和偏置溅射技术实现层间介质堆叠的高性能多层互连系统
提出了一种新型的双极或BiCMOS lsi多层互连系统。偏置溅射石英(BSQ)和等离子体CVD SiO(P-SiO)构成堆叠夹层,使高纵横比(0.82)的表面光滑成为可能。研究了薄膜的电学性能和制备过程中的损伤。结果表明,该叠层结构具有良好的电气稳定性和可靠性。该系统已成功应用于实际设备。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信