{"title":"A DENSELY INTEGRATED HIGH PERFORMANCE CMOS TESTER","authors":"Gary J. Lesmeister","doi":"10.1109/TEST.1991.519703","DOIUrl":null,"url":null,"abstract":"+zero Time Mux - tap path CMOS, when applied with a closed-loop, fast path design methodology, is a viable choice as the core technology for a densely integrated high performance integrated circuit tester.","PeriodicalId":272630,"journal":{"name":"1991, Proceedings. International Test Conference","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1991, Proceedings. International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1991.519703","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
+zero Time Mux - tap path CMOS, when applied with a closed-loop, fast path design methodology, is a viable choice as the core technology for a densely integrated high performance integrated circuit tester.